A boot strap driver is one of the techniques used when a gate signal voltage of an upper switch is greater than an input power voltage in an output buffer having a push-pull type inverter structure including the upper switch and a lower switch. Since the boot strap driver uses a voltage higher than the input power voltage, a level shift circuit that boosts the input power voltage to a boot strap power voltage is required.
FIG. 1 is a schematic diagram illustrating a related boot strap driver 100. Referring to FIG. 1, the boot strap driver 100 includes a pulse width modulation (PWM) signal generating circuit 1, a level shift circuit 2, a boot strap switching circuit 3, and a smoothing circuit 4.
The boot strap driver 100 has a single input structure where a single transistor, i.e., first transistor Q1 is used. Accordingly, switching of the boot strap driver 100 depends on a threshold voltage of the first transistor Q1, whereby switching speed is slow.
Also, in the boot strap driver 100, a third transistor Q3 and a fourth transistor Q4 are operated by a drain current of a second transistor Q2 and a voltage applied to a first resistor R1. Accordingly, characteristics of the first resistor R1 and a fifth transistor Q5 are varied by a temperature of a chip and frequency variation of an input voltage VDD. For this reason, an operational error of the third transistor Q3 and the fourth transistor Q4 occurs, and a defect ratio may increase during mass production of the chip.
Although a level shift circuit can be implemented in various ways, in the case of the boot strap driver, since a boot strap power source BOOT and SW is varied depending on a voltage that switches the third transistor Q3 and the fourth transistor Q4, a specific structure is required in view of inner pressure and efficiency.